1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2006-2008 Gabor Juhos <juhosg@openwrt.org> 4 */ 5 6 #ifndef _MYLOADER_H_ 7 #define _MYLOADER_H_ 8 9 /* 10 * Firmware file format: 11 * 12 * <header> 13 * [<block descriptor 0>] 14 * ... 15 * [<block descriptor n>] 16 * <null block descriptor> 17 * [<block data 0>] 18 * ... 19 * [<block data n>] 20 * 21 * 22 */ 23 24 /* Myloader specific magic numbers */ 25 #define MYLO_MAGIC_FIRMWARE 0x4C594D00 26 #define MYLO_MAGIC_20021103 0x20021103 27 #define MYLO_MAGIC_20021107 0x20021107 28 29 #define MYLO_MAGIC_SYS_PARAMS MYLO_MAGIC_20021107 30 #define MYLO_MAGIC_PARTITIONS MYLO_MAGIC_20021103 31 #define MYLO_MAGIC_BOARD_PARAMS MYLO_MAGIC_20021103 32 33 /* 34 * Addresses of the data structures provided by MyLoader 35 */ 36 #define MYLO_MIPS_SYS_PARAMS 0x80000800 /* System Parameters */ 37 #define MYLO_MIPS_BOARD_PARAMS 0x80000A00 /* Board Parameters */ 38 #define MYLO_MIPS_PARTITIONS 0x80000C00 /* Partition Table */ 39 #define MYLO_MIPS_BOOT_PARAMS 0x80000E00 /* Boot Parameters */ 40 41 /* Vendor ID's (seems to be same as the PCI vendor ID's) */ 42 #define VENID_COMPEX 0x11F6 43 44 /* Devices based on the ADM5120 */ 45 #define DEVID_COMPEX_NP27G 0x0078 46 #define DEVID_COMPEX_NP28G 0x044C 47 #define DEVID_COMPEX_NP28GHS 0x044E 48 #define DEVID_COMPEX_WP54Gv1C 0x0514 49 #define DEVID_COMPEX_WP54G 0x0515 50 #define DEVID_COMPEX_WP54AG 0x0546 51 #define DEVID_COMPEX_WPP54AG 0x0550 52 #define DEVID_COMPEX_WPP54G 0x0555 53 54 /* Devices based on the Atheros AR2317 */ 55 #define DEVID_COMPEX_NP25G 0x05e6 56 #define DEVID_COMPEX_WPE53G 0x05dc 57 58 /* Devices based on the Atheros AR71xx */ 59 #define DEVID_COMPEX_WP543 0x0640 60 #define DEVID_COMPEX_WPE72 0x0672 61 62 /* Devices based on the IXP422 */ 63 #define DEVID_COMPEX_WP18 0x047E 64 #define DEVID_COMPEX_NP18A 0x0489 65 66 /* Other devices */ 67 #define DEVID_COMPEX_NP26G8M 0x03E8 68 #define DEVID_COMPEX_NP26G16M 0x03E9 69 70 struct mylo_fw_header { 71 uint32_t magic; /* must be MYLO_MAGIC_FIRMWARE */ 72 uint32_t crc; /* CRC of the whole firmware */ 73 uint32_t res0; /* unknown/unused */ 74 uint32_t res1; /* unknown/unused */ 75 uint16_t vid; /* vendor ID */ 76 uint16_t did; /* device ID */ 77 uint16_t svid; /* sub vendor ID */ 78 uint16_t sdid; /* sub device ID */ 79 uint32_t rev; /* device revision */ 80 uint32_t fwhi; /* FIXME: firmware version high? */ 81 uint32_t fwlo; /* FIXME: firmware version low? */ 82 uint32_t flags; /* firmware flags */ 83 }; 84 85 #define FW_FLAG_BOARD_PARAMS_WP 0x01 /* board parameters are write protected */ 86 #define FW_FLAG_BOOT_SECTOR_WE 0x02 /* enable of write boot sectors (below 64K) */ 87 88 struct mylo_fw_blockdesc { 89 uint32_t type; /* block type */ 90 uint32_t addr; /* relative address to flash start */ 91 uint32_t dlen; /* size of block data in bytes */ 92 uint32_t blen; /* total size of block in bytes */ 93 }; 94 95 #define FW_DESC_TYPE_UNUSED 0 96 #define FW_DESC_TYPE_USED 1 97 98 struct mylo_partition { 99 uint16_t flags; /* partition flags */ 100 uint16_t type; /* type of the partition */ 101 uint32_t addr; /* relative address of the partition from the 102 flash start */ 103 uint32_t size; /* size of the partition in bytes */ 104 uint32_t param; /* if this is the active partition, the 105 MyLoader load code to this address */ 106 }; 107 108 #define PARTITION_FLAG_ACTIVE 0x8000 /* this is the active partition, 109 * MyLoader loads firmware from here */ 110 #define PARTITION_FLAG_ISRAM 0x2000 /* FIXME: this is a RAM partition? */ 111 #define PARTIIION_FLAG_RAMLOAD 0x1000 /* FIXME: load this partition into the RAM? */ 112 #define PARTITION_FLAG_PRELOAD 0x0800 /* the partition data preloaded to RAM 113 * before decompression */ 114 #define PARTITION_FLAG_LZMA 0x0100 /* the partition data compressed with LZMA */ 115 #define PARTITION_FLAG_HAVEHDR 0x0002 /* the partition data have a header */ 116 117 #define PARTITION_TYPE_FREE 0 118 #define PARTITION_TYPE_USED 1 119 120 #define MYLO_MAX_PARTITIONS 8 /* maximum number of partitions in the 121 partition table */ 122 123 struct mylo_partition_table { 124 uint32_t magic; /* must be MYLO_MAGIC_PARTITIONS */ 125 uint32_t res0; /* unknown/unused */ 126 uint32_t res1; /* unknown/unused */ 127 uint32_t res2; /* unknown/unused */ 128 struct mylo_partition partitions[MYLO_MAX_PARTITIONS]; 129 }; 130 131 struct mylo_partition_header { 132 uint32_t len; /* length of the partition data */ 133 uint32_t crc; /* CRC value of the partition data */ 134 }; 135 136 struct mylo_system_params { 137 uint32_t magic; /* must be MYLO_MAGIC_SYS_PARAMS */ 138 uint32_t res0; 139 uint32_t res1; 140 uint32_t mylo_ver; 141 uint16_t vid; /* Vendor ID */ 142 uint16_t did; /* Device ID */ 143 uint16_t svid; /* Sub Vendor ID */ 144 uint16_t sdid; /* Sub Device ID */ 145 uint32_t rev; /* device revision */ 146 uint32_t fwhi; 147 uint32_t fwlo; 148 uint32_t tftp_addr; 149 uint32_t prog_start; 150 uint32_t flash_size; /* Size of boot FLASH in bytes */ 151 uint32_t dram_size; /* Size of onboard RAM in bytes */ 152 }; 153 154 155 struct mylo_eth_addr { 156 uint8_t mac[6]; 157 uint8_t csum[2]; 158 }; 159 160 #define MYLO_ETHADDR_COUNT 8 /* maximum number of ethernet address 161 in the board parameters */ 162 163 struct mylo_board_params { 164 uint32_t magic; /* must be MYLO_MAGIC_BOARD_PARAMS */ 165 uint32_t res0; 166 uint32_t res1; 167 uint32_t res2; 168 struct mylo_eth_addr addr[MYLO_ETHADDR_COUNT]; 169 }; 170 171 #endif /* _MYLOADER_H_*/ 172
This page was automatically generated by LXR 0.3.1. • OpenWrt